New ask Hacker News story: Conway CPU in Hardware Memory?
Conway CPU in Hardware Memory?
3 by daly | 2 comments on Hacker News.
It is possible to create a general purpose, Turing complete computer using Conway's rules: https://ift.tt/31oSWDz Is anyone aware of what hardware circuits would be required if you wanted to create this in hardware memory? What does a single "Conway memory cell" circuit look like? It should be possible to implement this circuit on an FPGA. In addition, rather than loading the FPGA with a general purpose "Conway CPU", one could optimize it for the particular problem (e.g. matrix multiplies). It seems to me that implementing the CPU "in the memory" would overcome the "memory wall" problem (moving data between the CPU and memory).
3 by daly | 2 comments on Hacker News.
It is possible to create a general purpose, Turing complete computer using Conway's rules: https://ift.tt/31oSWDz Is anyone aware of what hardware circuits would be required if you wanted to create this in hardware memory? What does a single "Conway memory cell" circuit look like? It should be possible to implement this circuit on an FPGA. In addition, rather than loading the FPGA with a general purpose "Conway CPU", one could optimize it for the particular problem (e.g. matrix multiplies). It seems to me that implementing the CPU "in the memory" would overcome the "memory wall" problem (moving data between the CPU and memory).
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